An NES cartridge doesn’t contain a prerecorded video. It contains, among other things, instructions, level descriptions, graphic patterns, and music data. At every moment, the console builds the result that corresponds to the game’s current situation.

Four elements share most of the work:

• The CPU, or central processor, executes the program: movement, collisions, enemies, score, game rules, and interpreting inputs.
• The PPU, or graphics chip, builds the image from small patterns, background tile maps, palettes, and graphical objects called sprites.
• The APU, or sound chip, produces audio based on parameters set by the program.
• The cartridge provides memory and, often, additional logic. It genuinely participates in how the machine operates.

For more: general architecture overview.

One bit represents two possibilities

A bit can take two values: 0 or 1. You can picture it as a switch off or on. In circuits, these values are electrical states, not tiny mechanical switches.

One bit is enough, for example, to represent “button released” or “button pressed.” To express more possibilities, we group several bits.

Eight bits form a byte

0 0 0 0 1 1 0 1

Each added bit doubles the number of combinations: two bits give 4, three bits give 8, and eight bits give 2⁸ = 256. A byte can therefore represent an integer from 0 to 255.

In binary notation, positions are worth 1, 2, 4, 8, 16, 32, 64, and 128 from right to left:

Position value:           128  64  32  16   8   4   2   1
Bit:                        0   0   0   0   1   1   0   1

Represented value: 8 + 4 + 1 = 13

But a byte isn’t necessarily used as a number: it can describe buttons, a piece of an image, or an instruction. The program and hardware give meaning to bits.

Why is the NES called “8-bit”?

Its CPU is chiefly organized to manipulate data in eight-bit chunks. Its arithmetic unit works on values of that size, and its data bus transports eight bits at a time.

That does not mean “eight colors,” “256 memory slots,” nor “impossible to compute beyond 255.” To represent a large score or a position in a long level, the program can use multiple bytes.

Take 250 + 10 = 260. The result doesn’t fit in a single byte. An eight-bit addition then yields a result of 4 with a carry. The program carries this into a second byte:

Two bytes containing 1 and 4 can represent 1 × 256 + 4 = 260.

It’s the principle of “carry-over” addition from grade school, but with chunks of 256 values rather than decimal digits. A processor that can directly compute on sixteen bits can perform this addition more directly. We’ll revisit this comparison in the section on 16-bit consoles.

The compute core: a derivative of the MOS 6502

The main chip is a Ricoh 2A03 on the Famicom and NTSC NES units, or a Ricoh 2A07 on PAL NES. It combines notably the CPU, the APU, and logic for certain memory transfers.

The CPU derives from the MOS 6502, largely reusing its instruction set. An important difference is the absence of functional hardware decimal arithmetic BCD. That doesn’t prevent computing or displaying scores: the program performs the needed conversions.

MHz measure a clock rate, not an instruction count

An electronic clock paces the CPU’s work like a metronome. One megahertz, or MHz, corresponds to one million clock cycles per second.

• Famicom and NTSC NES: about 1.79 MHz.
• PAL NES: about 1.66 MHz.

An instruction generally requires several cycles: reading the bytes that describe it, possibly fetching a data value, performing an operation, etc. 1.79 MHz therefore does not mean 1.79 million completed instructions per second.

Machine code and assembly

The CPU doesn’t understand a sentence like “make the character jump.” It executes elementary operations encoded in bytes: that’s machine code. Assembly provides a readable notation for those operations.

In a common assembly syntax:

LDA #13

This instruction requests placing the value 13 into the CPU’s accumulator, a small working register. It translates to two bytes:

10101001  00001101
operation value 13

The CPU reads these bytes in sequence. An instruction can therefore take several bytes, even on an 8-bit processor.

For more: CPU and its memory map.

An address is not the content of its slot

Imagine memory like a cabinet filled with slots. Each slot has a number, its address, and can hold one byte.

Slot number 300 can contain the value 13. The number helps find the slot; it doesn’t describe its content. Similarly, a mailbox labeled 12,500 can contain a card that just says “3.”

The NES CPU uses sixteen-bit addresses. It can therefore distinguish:

2¹⁶ = 65,536 addresses, or a 64 KiB address space.

A KiB, or kibibyte, contains 1,024 bytes. Possible addresses go from 0 to 65,535.

Two buses of different widths

A bus is a set of electrical connections that carry information. The CPU notably has:

• a sixteen-bit address bus, indicating where to read or write;
• an eight-bit data bus, transporting the content read or written.

CPU ─── 16-bit address ───► Memory
              “slot 300”

CPU ◄── 8-bit data ─────── Memory
              “value 13”

There is thus no contradiction between “8-bit CPU” and “16-bit addresses.” These numbers describe different functions.

64 KiB of addresses doesn’t mean 64 KiB of RAM

The console includes notably the following memories:

• 2 KiB of work RAM for variables, positions, counters, and temporary data;
• 2 KiB of RAM for background maps, accessed in the PPU’s address space;
• 256 bytes of primary OAM, describing sprites;
• a small palette memory, exposed in a 32-byte area with mirrored addresses.

On top of that come the cartridge or Disk System memories. ROM retains its content without power and is normally not modified during play. RAM is writable, but it normally loses content once unpowered.

Addresses for memory… and to command circuits

Some addresses do not correspond to a RAM slot. They give access to hardware registers: control points or status readouts of circuits. Writing to an address can thus modify sound or display.

In the map below, the $ prefix indicates hexadecimal notation (base sixteen). For example, $FF equals 255.

The small $4018–$401F area, tied to normally unused test functions, is omitted. Depending on hardware, reads and writes to the same address can have different effects.

Mirroring is not a copy: multiple addresses correspond to the same physical memory. Modifying that memory via one address thus changes what you find via its other addresses.

The PPU has a separate address space

The graphics chip has its own 16 KiB address space, from $0000 to $3FFF. It contains graphic patterns, background maps, and palettes. Again, this isn’t necessarily 16 KiB of distinct physical RAM: some zones are mirrored.

The CPU accesses these via the PPU registers. A CPU address and a PPU address with the same number do not necessarily designate the same thing.

For more: CPU memory map and PPU memory map.

What a cartridge contains

The shell protects a small PCB. Depending on the game, it may include:

• PRG-ROM: the program, but also levels, text, music sequences, or compressed data;
• CHR-ROM: graphic patterns directly accessible to the PPU;
• CHR-RAM, generally instead of CHR-ROM: a graphic memory the program fills and can modify;
• Additional RAM, used as working memory or for save data;
• logic for bank selection, synchronization, and sometimes audio generation.

PRG and CHR mainly describe the role and connections of those memories. PRG-ROM thus doesn’t only contain instructions. Some boards even combine CHR-ROM and CHR-RAM.

In a typical battery-backed save cartridge, a battery keeps a RAM powered when the console is off. The saved part is not written into game ROM. Other save technologies exist; see the media evolution section.

The game is usually not fully loaded into the console

With a typical cartridge, the CPU usually reads its instructions directly from the cartridge ROM via the connector and buses. The PPU can, in turn, read patterns from CHR-ROM.

There is thus no need to copy the entire game into the 2 KiB of RAM before running it. That doesn’t prohibit copying, preparing, or decompressing some data while running.

The apparent limit: 32 KiB of program and 8 KiB of patterns

A simple NROM cartridge typically has 16 or 32 KiB of PRG-ROM and 8 KiB of CHR-ROM. With only 16 KiB of program, the same ROM appears twice in the CPU’s 32 KiB window.

Yet many games go far beyond those sizes. They use a mapper: the cartridge logic that organizes the memory visible to the console.

Bank switching: changing which page is visible

Bank switching splits memory into blocks and chooses which ones appear at certain addresses.

Imagine a 64 KiB ROM divided into four 16 KiB banks, named A, B, C, and D. A common setup changes the bank visible in the lower half of the window while keeping the last bank fixed in the upper half:

The CPU keeps sixteen-bit addresses, but can successively access a much larger amount of memory. The same principle applies to the pattern memory the PPU sees.

A write to an area normally read as ROM may instead command the mapper: it does not necessarily modify the ROM itself.

Not all mappers are big specialized chips

Some boards use a few simple logic components. Others integrate a specialized chip, like MMC1 or MMC3 from Nintendo. Even the fixed NROM organization is called “mapper 0” in emulation formats, though it performs no active switching.

Depending on the model, the mapper can also manage RAM, organize background maps, produce interrupts useful for visual effects, or add sound. This hardware explains part of the dramatic evolution of games without changing consoles.

For more: board families and mappers.

The PPU is generally a Ricoh 2C02 on NTSC machines, or a 2C07 on PAL NES units. The logical image is 256 × 240 pixels. Timing differences are detailed in the regional section.

Not one big complete image to redraw in memory

The NES does not primarily rely on a framebuffer, i.e., a memory holding the color of each pixel in the full image. Instead, the PPU assembles the image during scanout, line by line, from reusable elements.

It’s like a mosaic: you keep a collection of patterns, then a map indicating where to place them. The CPU doesn’t have to recompute every pixel of a wall made of identical bricks.

Tiles: 8 × 8 pixel patterns

A tile measures 8 × 8 pixels. Each pixel is described by two bits, which select one of four values. These values are color indices, not directly red, green, and blue components.

8 × 8 pixels × 2 bits = 128 bits = 16 bytes per pattern.

The data is organized in two bitplanes: one plane provides the first bit of each pixel, and the second plane provides the other bit.

The 8 KiB of patterns visible at a given time can contain 512 patterns of 8 × 8 pixels, split into two tables of 256 patterns. Which table is used depends on PPU settings and on the element type.

The background: a tile map and attributes

A nametable describes a grid of 32 × 30 tiles, i.e., a 256 × 240 pixel screen. Each entry essentially says: “at this position, use this pattern.”

That’s 960 tile indices. A table of 64 attribute bytes complements this by choosing palettes, normally per 16 × 16 pixel regions. The whole set is exactly 1 KiB.

Multiple positions can reuse the same pattern. So a row of twenty bricks does not require twenty distinct brick drawings in memory.

Sprites: elements placed independently of the background

A sprite is a small graphic element positioned independently of the background. It can represent part of a character, a projectile, an item, or an effect.

• The primary OAM holds 64 sprite entries.
• Sprite size is 8 × 8 or 8 × 16 pixels, depending on a global PPU setting.
• The PPU retains at most eight sprites per line in standard operation.

Each entry uses four bytes: position, pattern index, and attributes such as palette, horizontal or vertical flip, and priority relative to the background. A large character is typically composed of multiple sprites.

If too many sprites are on one line, some won’t be displayed. Many games change sprite ordering from one frame to the next to spread out the disappearances: this creates the characteristic flicker. This alternating flicker is often a deliberate programming strategy, not an automatic fixed effect of the PPU.

Palettes and colors

The PPU uses 64 base color codes. They don’t correspond to 64 all-distinct colors: several codes can produce identical or very similar results. Exact rendering also depends on the analog signal, the TV, and, in emulation, the chosen conversion palette.

A palette is a small list of colors. The values in patterns select an entry from that list. In the common case:

• the background has four palettes of three colors, plus a shared background color: 13 colors;
• sprites have four palettes of three colors, with their fourth value being transparent: 12 additional colors.

That yields up to 25 simultaneously selected colors in a standard image. This isn’t an absolute limit on all effects: changing palettes or certain settings during scanout can produce other results.

Scrolling and background maps

Scrolling moves the window over the background. During movement, the program refreshes portions that are about to enter the screen.

The PPU provides addresses for four background maps, but the console typically has enough RAM to store two. The cartridge determines how the four logical slots map to those two physical memories: this is called nametable mirroring. Some boards add RAM to have four distinct maps.

Names can be misleading: vertical mirroring repeats maps top-to-bottom and usually leaves two distinct maps side by side, so it’s often used for horizontal scrolling. Horizontal mirroring does the opposite. These names describe memory repetition, not a mandatory scrolling direction.

From logical image to the TV

The result is sent as an analog video signal. Original models commonly use composite video or an RF output intended for the antenna input. In France, the SCART connector was commonly used.

The signal is low-definition and non-interlaced in typical use, often described as “240p” for NTSC machines. Logical pixels need not be considered square on a TV. In addition, overscan can mask part of the image edges.

For more: PPU memory, rendering, and palettes.

NTSC/PAL display comparison
(images shamelessly borrowed from this article)

A standard controller transmits eight states

The eight inputs are: A, B, Select, Start, Up, Down, Left, and Right. These are digital inputs: each button is pressed or released. The D-pad does not indicate an analog angle.

A shift register captures the state of the buttons, then presents it one bit at a time. The program commands this capture by writing to $4016, then reads the successive states:

• via $4016 for the first controller;
• via $4017 for the second.

“Button A is pressed” does not inherently mean “jump”: the game program assigns that meaning.

The original Famicom has a peculiarity: its second controller lacks Start and Select, but includes a microphone. It provides a rudimentary sound detection; it’s not an input for recording a voice like on a modern computer.

The APU has five basic sound channels

A sound channel is a generator that the program can configure. Several channels run simultaneously and are mixed. The APU integrated into the main chip provides:

1. Two pulse (rectangular) channels, often used for melodies and harmony parts.
2. One triangle channel, often used for bass lines.
3. One pseudo-random noise channel, useful for percussion and many sound effects.
4. One DMC channel, which reads audio data coded as successive level changes.

For DMC, each bit usually commands a small increase or decrease of an accumulated level. This delta coding is neither MP3 nor simply a stream of eight-bit amplitude samples.

Music is usually stored as notes, durations, and parameters, possibly with samples. A game routine translates that data into APU settings. The APU then continues producing audio while the CPU handles other tasks.

Additional audio can come from the cartridge

The Famicom routes audio through the cartridge connector. An extra circuit can thus add its sounds to those of the console. The Disk System and some cartridges using chips like VRC6, VRC7, or Sunsoft 5B leverage this.

The NES 72-pin connector does not carry this audio path in the same way. A simple cartridge adapter therefore does not guarantee reproduction of a Famicom game’s extra audio. Official NES versions are generally designed around the five internal channels.

For more: controller reading and APU and audio expansions.

How does the program start?

The CPU has a hardware startup mechanism. Upon reset, it reads two bytes at addresses $FFFC–$FFFD. Together they form a sixteen-bit address: the RESET vector, which indicates where to begin execution.

With a typical cartridge, these bytes come from the cartridge memory. The program then initializes the data it needs and configures the circuits. Initial RAM content must not be assumed reliable.

The cartridge-based console does not have an operating system that launches all games. On models equipped with it, the CIC lockout (Checking Integrated Circuit, often called the 10NES system) must still allow a stable startup. The Disk System is another case: it brings its own BIOS.

Example: making a character jump

1. Read inputs. The game detects that the player has just pressed A.
2. Update game state. It gives the character a vertical speed, updates position, then tests collisions.
3. Prepare display changes. It builds new sprite descriptions in RAM and a list of background updates.
4. Transfer data at the right moment. It typically uses the interval between visible frames to update video memories.
5. Display the new state. The PPU builds the next image from available information.

Collisions are usually computed from positions and level data, not by analyzing the colors shown on the TV.

VBlank: a window for updates

Between visible frames is the VBlank, or vertical blanking interval. It’s a particularly suitable time for transfers to the PPU, because the PPU is no longer reading those same memories to draw the visible scene.

At the start of VBlank, the PPU can trigger a NMI, if the program has enabled it. This interrupt temporarily makes the CPU run a specific routine before resuming prior work.

A DMA notably allows transferring the 256 bytes of sprite descriptions to OAM without a copy loop of instruction-by-instruction loads/stores. The CPU is however halted during this transfer: DMA doesn’t make the operation free.

Available time is limited. Games therefore spread some updates over multiple frames or leverage carefully synchronized changes during scanout. The exact organization varies by program.

Why can a game slow down?

If computations are not finished in time, a game may keep the same state for several frames. The video cadence may remain stable while the game itself advances more slowly. It’s not necessarily the CPU clock that slows down.

This phenomenon differs from sprite dropouts caused by the eight-sprites-per-line limit.

Main hardware versions

The words NTSC and PAL designate families of analog TV standards. For the NES, they are also used to distinguish hardware variants whose clocks and frame rates are not identical.

The additional PAL scanlines don’t automatically become extra graphics lines usable by the game. The division between active image, borders, and blanking intervals differs, as do the proportions on a TV set.

Why are some PAL games slower?

Suppose a game moves an object by one pixel per frame. At about 60 frames per second, it advances ~60 pixels per second. If the same principle is kept at 50 frames per second, it advances only 50 pixels per second.

A port that fails to compensate for this difference may therefore be about 17% slower. But this is not universal: some PAL games were adjusted, wholly or partially.

Distinguish this frame cadence difference from that of the CPU: the PAL CPU is only about 7% less clocked than the NTSC CPU. Frame duration, available transfer time, and the CPU/PPU clock relationship also change.

Audio needs adjustments too: produced frequencies for some settings and channel timings differ. A port may thus have to correct tempo, note pitches, and effect synchronization.

Connectors, controllers, and video outputs

• Original Famicom: 60-pin cartridges, two controllers attached to the console, a microphone on controller 2, a front expansion port, and RF output for the Japanese market.
• Classic NES: 72-pin cartridges and detachable controllers. Video outputs vary by country and model; many front-loading NES units offer RF and composite.
• 1993 AV Famicom: detachable controllers and composite output, without the controller-2 microphone of the original.
• Top-loading NES: the North American NES-101 typically lacks the CIC and usually provides RF output.

Some French NES units provide RGB via SCART after converting an internal composite signal. An RGB connector thus does not necessarily mean that the PPU natively produces an RGB image.

The twelve extra pins of the NES cartridge do not make the processor “wider.” Signal assignments differ, notably for lockout and expansions; the Famicom’s audio lines are not simply preserved.

Beware of clones and commercial names

Not all compatible devices exactly follow Nintendo’s variants. Clones often called Dendy, for example, combine a 50 Hz video cadence with synchronization choices differing from those of an official PAL NES. A “50 Hz” label is thus not enough to identify the architecture.

For more: clocks and NTSC/PAL differences.